Z80185 Datasheet, PDF (66/95 Pages) Zilog, Inc. – SMART PERIPHERAL CONTROLLERS

Zilog
PRELIMINARY
Bidirectional Centronics Registers
Reading the Parallel Controls (PARC) register allows soft-
ware to sense the state of the input signals per the current
mode, plus two or three status flags:
Z80185/Z80195
SMART PERIPHERAL CONTROLLERS
Busy PError Select nFault nAck IllOp DREQ Idle
7
6
5
4
3
2
1
0
Figure 74a. Reading PARC in a Host Mode
(I/O Address %DA)
nAutoFd nStrobe nSlctIn nInit
7
6
5
4
IllOp DREQ Idle
3
2
1
0
Figure 74b. Reading PARC in a Peripheral Mode
(I/O Address %DA)
The controller sets IllOp (Illegal Operation) when it detects
an error in the protocol, for example, if it’s in Peripheral
mode and it detects that the host has driven P1284Active
(nSelectIn) Low at a time that mandates an immediate
Abort, that is, outside one of the “windows” in which this
event indicates an organized disengagement. If “status
interrupts” are enabled, such an interrupt is always re-
quested when IllOp is set. Writing PARM with NewMode=1
clears IllOp.
DREQ is the Request presented to the DMA channels,
which may or may not be programmed to service this
request. If not, an interrupt can be enabled when DREQ is
set.
Writing to PARC allows the software to set and clear the
output signals per the current mode:
1=drive 1=drive 1=drive 1=drive 1=drive 1=drive 1=drive 1=drive
nAutoFd nStrobe nSelctIn nInit nAutoFd nStrobe nSelctIn nInit
High
High
High
High
Low
Low
Low
Low
7
6
5
4
3
2
1
0
Figure 75a. Writing to PARC in a Host Mode
(I/O Address %DA)
1=drive
Busy
High
7
1=drive
PError
High
6
1=drive
Select
High
5
1=drive
nFault
High
4
1=drive
Busy
Low
3
1=drive
PError
Low
2
1=drive
Select
Low
1
1=drive
nFault
Low
0
Figure 75b. Writing to PARC in a Peripheral Mode
(I/O Address %DA)
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DS971850301