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DS90UB964-Q1 Datasheet, PDF (97/116 Pages) Texas Instruments – DS90UB964-Q1 Quad FPD-Link III Deserializer Hub
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DS90UB964-Q1
SNLS500 – JULY 2016
Table 14. Digital Page 0 Indirect Registers (continued)
Indirect Addr
Page (hex)
0x65
Register Name
CSI1_THS_ZERO
0x66 CSI1_THS_TRAIL
0x67 CSI1_THS_EXIT
0x68 CSI1_TPLX
Bit(s) Field
Type Default Description
7
MR_THS_ZERO_OV RW
0
Override CSI Ths-zero parameter
0: Ths-zero is automatically determined
1: Override Ths-zero with value in bits 6:0 of
this register
6:0 MR_THS_ZERO
R
0x0
Ths-zero value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
7
MR_THS_TRAIL_OV RW
0
Override CSI Ths-trail parameter
0: Ths-trail is automatically determined
1: Override Ths-trail with value in bits 6:0 of
this register
6:0 MR_THS_TRAIL
R
0x0
Ths-trail value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
7
MR_THS_EXIT_OV RW
0
Override CSI Ths-exit parameter
0: Ths-exit is automatically determined
1: Override Ths-exit with value in bits 6:0 of
this register
6:0 MR_THS_EXIT
R
0x0
Ths-exit value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
7
MR_TPLX_OV
RW
0
Override CSI Tplx parameter
0: Tplx is automatically determined
1: Override Tplx with value in bits 6:0 of this
register
6:0 MR_TPLX
R
0x0
Tplx value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
LEGEND:
• RW = Read Write
• RW/SC = RW/SC = Read Write access/Self Clearing bit
• R/P = Read Only, Permanent value
• R/COR = Read Only, Clear On Read
Copyright © 2016, Texas Instruments Incorporated
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