DS90UB964-Q1 Datasheet, PDF (25/116 Pages) Texas Instruments – DS90UB964-Q1 Quad FPD-Link III Deserializer Hub

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DS90UB964-Q1
SNLS500 – JULY 2016
FV
TFV_LV
LV
Figure 17. Minimum FV to LV
MODE
RAW12 LF
RAW12 HF
RAW10
Table 7. Minimum FV to LV Setup Requirement (in Serializer PCLKs)
FV_MIN_TIME
Conversion Factor
1
1.5
2
Absolute Min
(FV_MIN_TIME = 0)
2
3
5
Default
(FV_MIN_TIME = 128)
130
195
261
For other settings of FV_MIN_TIME, the required FV to LV setup in Serializer PCLKs can be determined by:
Absolute Min + (FV_MIN_TIME * Conversion factor)
8.4.9 CSI-2 Protocol Layer
The DS90UB964-Q1 implements High-Speed mode to forward CSI-2 Low Level Protocol data. This includes
features as described in the Low Level Protocol section of the MIPI CSI-2 Specification. It supports short and
long packet formats.
The feature set of the protocol layer implemented by the CSI-2 TX is:
• Transport of arbitrary data (payload-independent)
• 8-bit word size
• Support for up to four interleaved virtual channels on the same link
• Special packets for frame start, frame end, line start and line end information
• Descriptor for the type, pixel depth and format of the Application Specific Payload data
• 16-bit Checksum Code for error detection
Figure 18 shows the CSI-2 protocol layer with short and long packets.
DATA:
Short
Packet
Long
Packet
Long
Packet
Short
Packet
ST SP ET LPS ST PH
DATA
PF ET LPS ST PH
DATA
PF ET LPS ST SP ET
KEY:
ST ± Start of Transmission
ET ± End of Transmission
LPS ± Low Power State
PH ± Packet Header
PF ± Packet Footer
Figure 18. CSI-2 Protocol Layer With Short and Long Packets
8.4.10 CSI-2 Short Packet
The short packet provides frame or line synchronization. Figure 19 shows the structure of a short packet. A short
packet is identified by data types 0x00 to 0x0F.
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