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DS90UB964-Q1 Datasheet, PDF (96/116 Pages) Texas Instruments – DS90UB964-Q1 Quad FPD-Link III Deserializer Hub
DS90UB964-Q1
SNLS500 – JULY 2016
www.ti.com
Table 14. Digital Page 0 Indirect Registers (continued)
Indirect Addr
Page (hex)
0x48
Register Name
CSI0_TPLX
0x60 CSI1_TCK_PREP
0x61 CSI1_TCK_ZERO
0x62 CSI1_TCK_TRAIL
0x63 CSI1_TCK_POST
0x64 CSI1_THS_PREP
Bit(s) Field
Type Default Description
7
MR_TPLX_OV
RW
0
Override CSI Tplx parameter
0: Tplx is automatically determined
1: Override Tplx with value in bits 6:0 of this
register
6:0 MR_TPLX
R
0x0
Tplx value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
7
MR_TCK_PREP_OV RW
0
Override CSI Tck-prep parameter
0: Tck-prep is automatically determined
1: Override Tck-prep with value in bits 6:0 of
this register
6:0 MR_TCK_PREP
R
0x0
Tck-prep value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
7
MR_TCK_ZERO_OV RW
0
Override CSI Tck-zero parameter
0: Tck-zero is automatically determined
1: Override Tck-zero with value in bits 6:0 of
this register
6:0 MR_TCK_ZERO
R
0x0
Tck-zero value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
7
MR_TCK_TRAIL_OV RW
0
Override CSI Tck-trail parameter
0: Tck-trail is automatically determined
1: Override Tck-trail with value in bits 6:0 of
this register
6:0 MR_TCK_TRAIL
R
0x0
Tck-trail value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
7
MR_TCK_POST_OV RW
0
Override CSI Tck-post parameter
0: Tck-post is automatically determined
1: Override Tck-post with value in bits 6:0 of
this register
6:0 MR_TCK_POST
R
0x0
Tck-post value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
7
MR_THS_PREP_OV RW
0
Override CSI Ths-prep parameter
0: Ths-prep is automatically determined
1: Override Ths-prep with value in bits 6:0 of
this register
6:0 MR_THS_PREP
R
0x0
Ths-prep value
RW
If bit 7 of this register is 0, this field is read-
only, indicating current automatically
determined value.
If bit 7 of this register is 1, this field is
read/write.
96
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