DS90UB964-Q1 Datasheet, PDF (4/116 Pages) Texas Instruments – DS90UB964-Q1 Quad FPD-Link III Deserializer Hub

DS90UB964-Q1
SNLS500 – JULY 2016
www.ti.com
Table 1. Pin Functions (continued)
PIN
NAME
NO.
I/O
TYPE
DESCRIPTION
CSI1_D3N/P
42, 43
O, DPHY
CSI1 Differential data pair 3
If unused, leave this pin unconnected.
FPD-LINK III INTERFACE
RIN0-/+
51, 50
I/O, CML
FPD-Link III Input/Output. The pin must be AC-coupled with a capacitor.
If port is unused, set RX_PORT_CTL register bit N to 0 to disable.
RIN1-/+
54, 53
I/O, CML
FPD-Link III Input/Output. The pin must be AC-coupled with a capacitor.
If port is unused, set RX_PORT_CTL register bit N to 0 to disable.
RIN2-/+
60, 59
I/O, CML
FPD-Link III Input/Output. The pin must be AC-coupled with a capacitor.
If port is unused, set RX_PORT_CTL register bit N to 0 to disable.
RIN3-/+
63, 62
I/O, CML
FPD-Link III Input/Output. The pin must be AC-coupled with a capacitor.
If port is unused, set RX_PORT_CTL register bit N to 0 to disable.
GPIO PINS (GENERAL PURPOSE INPUT OUTPUT)
GPIO[0]
9
I/O, LVCMOS, General Purpose Input/Output 0
PD
See GPIO Support.
GPIO[1]
10
I/O, LVCMOS, General Purpose Input/Output 1
PD
See GPIO Support.
GPIO[2]
14
I/O, LVCMOS, General Purpose Input/Output 2
PD
See GPIO Support.
GPIO[3]
15
I/O, LVCMOS, General Purpose Input/Output 3
PD
See GPIO Support.
GPIO[4]
17
I/O, LVCMOS, General Purpose Input/Output 4
PD
See GPIO Support.
GPIO[5]
18
I/O, LVCMOS, General Purpose Input/Output 5
PD
See GPIO Support.
GPIO[6]
19
I/O, LVCMOS, General Purpose Input/Output 6
PD
See GPIO Support.
GPIO[7]
20
I/O, LVCMOS, General Purpose Input/Output 7
PD
See GPIO Support.
I2C PINS
I2C_SCL
12
I/O, LVCMOS, I2C Clock Input / Output Interface
Open Drain Recommended Pull-up⁽¹⁾ to 4.7 kΩ to VDDIO.
I2C_SDA
11
I/O, LVCMOS, I2C Data Input / Output Interface
Open Drain Recommended Pull-up⁽¹⁾ to 4.7 kΩ to VDDIO.
I2C_SCL2
8
I/O, LVCMOS, I2C Clock Input / Output Interface
Open Drain Recommended Pull-up⁽¹⁾ to 4.7 kΩ to VDDIO.
I2C_SDA2
7
I/O, LVCMOS, I2C Data Input / Output Interface
Open Drain Recommended Pull-up⁽¹⁾ to 4.7 kΩ to VDDIO.
IDx
46
S
I2C Serial Control Bus Device ID Address
Connect to external pull-up to VDD18 and pull-down to GND to create a voltage
divider. See Table 10.
CONTROL PINS
MODE
45
S
Mode selection
Connect to external pull-up to VDD18 and pull-down to GND to create a voltage
divider. See Table 2.
PDB
3
I, 1.8V
Power-down mode
LVCMOS, INPUT IS 3.3V TOLERANT
PD
PDB = 1.8 V, device is enabled (normal operation)
PDB = 0, device is powered down.
STATUS PINS
INTB
6
O, LVCMOS, Interrupt Output
Open Drain INTB is an active-low open drain and controlled by the status registers.
Recommended Pull-up with 4.7 kΩ to VDDIO.
POWER AND GROUND
(1) Optimum Pull-up Resistor (RPU) value depends on the I2C mode of operation, refer to SLVA689
4
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