DS90UB964-Q1 Datasheet, PDF (5/116 Pages) Texas Instruments – DS90UB964-Q1 Quad FPD-Link III Deserializer Hub

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PIN
NAME
NO.
VDDIO
16
VDD_CSI0
21
VDD_CSI1
33
VDDL1
13
VDDL2
44
VDD_FPD1
52
VDD_FPD2
61
VDD18_P2
2
VDD18_P3
1
VDD18_P1
47
VDD18_P0
48
VDD18A
32
VDD18_FPD0
VDD18_FPD1
VDD18_FPD2
VDD18_FPD3
GND
49
55
58
64
DAP
OTHERS
REFCLK
5
TESTEN
CMLOUTP/N
4
56, 57
DS90UB964-Q1
SNLS500 – JULY 2016
Table 1. Pin Functions (continued)
I/O
TYPE
DESCRIPTION
P
1.8 V (±5%) OR 3.3V (±10%) LVCMOS I/O Power
Requires 1 μF, 0.1 μF, and 0.01 μF capacitors to GND
P
1.1 V (±5%) Power Supplies
Requires 0.1 μF or 0.01 μF capacitors to GND at each VDD pin.
P
1.1 V (±5%) Power Supplies
Requires 0.1 μF or 0.01 μF capacitors to GND at each VDD pin.
P
1.1 V (±5%) Power Supplies
Requires 0.1 μF or 0.01 μF capacitors to GND at each VDD pin.
P
1.8 V (±5%) Power Supplies
Requires 0.1 μF or 0.01 μF capacitors to GND at each VDD pin.
P
1.8 V (±5%) Power Supplies
Requires 0.1 μF or 0.01 μF capacitors to GND at each VDD pin.
P
1.8 V (±5%) Power Supplies
Requires 0.1 μF or 0.01 μF capacitors to GND at each VDD pin.
G
DAP is the large metal contact at the bottom side, located at the center of the VQFN
package. Connect to the ground plane (GND).
I, LVCMOS
Reference clock oscillator input.
25 MHz or 23 MHz LVCMOS-level oscillator input (100 ppm).
For 400/800 Mbps / 1.6 Gbps a 25 MHz input is used, and for < 1.5 Gbps operation
use 23 MHz (1.47 Gbps)
See REFCLK.
I, LVCMOS, PD This pin should be tied Low.
O
Channel Monitor Loop-through Output Driver
Route to test point or pad with 100 Ω termination resistor between pins for channel
monitoring (recommended). See Channel Monitor Loop-Through Output Driver.
The definitions below define the functionality of the I/O cells for each pin.
TYPE:
• P = Power Supply
• G = Ground
• CML = CML Interface
• DPHY = MIPI DPHY Interface
• LVCMOS = LVCMOS pin
• I = Input
• O = Output
• I/O = Input/Output
• S = Strap Input
• PD, PU = Internal Pull-Down/Pull-Up (All strap pins have weak internal pull-ups or pull-downs determined by IOZ specification. If the
default strap value is needed to be changed then an external 1 kΩ resistor should be used.)
Copyright © 2016, Texas Instruments Incorporated
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