DS90UB964-Q1 Datasheet, PDF (100/116 Pages) Texas Instruments – DS90UB964-Q1 Quad FPD-Link III Deserializer Hub

DS90UB964-Q1
SNLS500 – JULY 2016
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Typical Application (continued)
9.2.1 Design Requirements
For the typical design application, use use the parameters listed in Table 15.
Table 15. Design Parameters
DESIGN PARAMETER
VDDIO
VDD11
VDD18
AC Coupling Capacitor for STP with 913AQ/913Q/933Q: RIN[3:0]±
AC Coupling Capacitor for Coaxial with 913AQ/933Q: RIN[3:0]+
AC Coupling Capacitor for Coaxial with 913AQ/933Q: RIN[3:0]-
EXAMPLE VALUE
1.8 V or 3.3 V
1.1 V
1.8 V
100 nF (50 WV 0402)
100 nF (50 WV 0402)
47 nF (50 WV 0402)
The SER/DES supports only AC-coupled interconnects through an integrated DC-balanced decoding scheme.
External AC-coupling capacitors must be placed in series in the FPD-Link III signal path as shown in Figure 39.
For applications utilizing single-ended 50-Ω coaxial cable, terminate the unused data pins (RIN0–, RIN1–, RIN2–,
RIN3–) with an AC-coupling capacitor and a 50-Ω resistor.
SER
D_OUT+
D_OUT-
R_IN+
R_IN-
DES
Figure 39. AC-Coupled Connection (STP)
SER
D_OUT+
R_IN+
DES
D_OUT-
50Q
50Q
R_IN-
Figure 40. AC-Coupled Connection (Coaxial)
For high-speed FPD–Link III transmissions, use the smallest available package for the AC-coupling capacitor to
help minimize degradation of signal quality due to package parasitics.
9.2.2 Detailed Design Procedure
Figure 44 and Figure 44 show typical applications of the DS90UB964-Q1 for multi-camera surround view system.
From Figure 38, the FPD-Link III must have an external 0.100 μF / 0.47 μF AC coupling capacitors for coaxial
interconnects. The same AC coupling capacitor values should be matched on the paired serializer boards. The
deserializer has an internal termination. Bypass capacitors are placed near the power supply pins. At a minimum,
0.1μF or 0.01μF capacitors should be used for each of the core supply pins for local device bypassing. Ferrite
beads are placed on the VDD18 and VDD11 supplies for effective noise suppression.
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