SMJ34020A_06 Datasheet, PDF (83/97 Pages) Texas Instruments – GRAPHICS SYSTEM PROCESSOR

SMJ34020A
GRAPHICS SYSTEM PROCESSOR
SGUS011D − APRIL 1991 − REVISED SEPTEMBER 2004
local-bus timing: RAS, CAS0−CAS3, WE, TR/QE, and SF (see Notes 5 and 11 and Figure 49)
(continued)
34020A-32
34020A-40
NO.
UNIT
MIN
MAX
MIN
MAX
97
tsu(WEL-CEL)
Setup time, write low before CAS no
longer high (on write cycles)
tQ −15
tQ − 13.5
ns
98
tw(REH)
Pulse duration, RAS high
4tQ −12 + s
4tQ − 10 + s
ns
99
tw(REL)
Pulse duration, RAS low
4ntQ −12 + s’
4n tQ − 4 + s’
ns
100 tw(CEH)
Pulse duration, CAS high
2tQ −12
2tQ − 10
ns
101 tw(CEL)
Pulse duration, CAS low
2tQ −12
2tQ − 8
ns
102
td(REL-CEH)
Delay time, RAS low to CAS no longer
low
4tQ −12 + s
4tQ − 4+s
ns
NOTES: 5. s = tQ if using the clock stretch;
s = 0 otherwise
s’ is 2tQ when using the clock stretch since both the address cycle and read cycle of a Read-Modify-Write will be stretched.
11. Parameter 96 has been eliminated.
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