SMJ34020A_06 Datasheet, PDF (50/97 Pages) Texas Instruments – GRAPHICS SYSTEM PROCESSOR

SMJ34020A
GRAPHICS SYSTEM PROCESSOR
SGUS011D − APRIL 1991 − REVISED SEPTEMBER 2004
cycle timing examples (continued)
In Figure 27, the host-access request is synchronized to the SMJ34020A at the beginning of Q4 so that the
local-memory cycle can begin in Q1. If the external host-access request occurs after the setup time requirement
before Q4, the request is not considered until the next Q4 cycle. In order to provide back-to-back accesses as
indicated in this example, the host must remove HCS on receipt of HRDY and reassert it before Q4 (it can also
remove and reassert HREAD with HCS).
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