SMJ34020A_06 Datasheet, PDF (48/97 Pages) Texas Instruments – GRAPHICS SYSTEM PROCESSOR

SMJ34020A
GRAPHICS SYSTEM PROCESSOR
SGUS011D − APRIL 1991 − REVISED SEPTEMBER 2004
cycle timing examples (continued)
Host-Default
Cycle
Beginning
of Cycle
Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
LCLK1
LCLK2
LAD
Hi-Z
GI
R0
R1
CAMD
RCA
SF
ALTCH
RAS
CAS
WE
TR / QE
DDIN
DDOUT
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Row
LRDY
SIZE16
PGMD
BUSFLT
HOE
Hi-Z
HDST
Hi-Z
Figure 25. Multiprocessor-Interface-Cycle Timing (High-Impedance Signals)
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