SMJ34020A_06 Datasheet, PDF (55/97 Pages) Texas Instruments – GRAPHICS SYSTEM PROCESSOR

SMJ34020A
GRAPHICS SYSTEM PROCESSOR
cycle timing examples (continued)
SGUS011D − APRIL 1991 − REVISED SEPTEMBER 2004
HA / HBS
HCS
HREAD
HWRITE
HRDY
DATA
(out)
Previous Read
Local-Memory Host Read I/O Cycle
Valid
HOE
Q4 Q1 Q2 Q3 Q4† Q1 Q2 Q3 Q4 Q1
HDST
LAD
I/O Data
GI
CAMD
RCA
Row
Column
SF
ALTCH
RAS
CAS
WE
TR / QE
DDIN
DDOUT
LRDY
SIZE16
PGMD
BUSERR
R0
R1
† _{See clock stretch, page 21.}
Figure 29. Host-Read Cycle Timing From SMJ34020A I/O Registers
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