SMJ34020A_06 Datasheet, PDF (59/97 Pages) Texas Instruments – GRAPHICS SYSTEM PROCESSOR

SMJ34020A
GRAPHICS SYSTEM PROCESSOR
SGUS011D − APRIL 1991 − REVISED SEPTEMBER 2004
cycle timing examples (continued)
The timing example in Figure 32 is like a memory write cycle except that RAS and SF are high.
Command
Data Transfer
Data Transfer
Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
LCLK1
Q2 Q3 Q4 Q1
LCLK2
GI
LAD (TMS34020A)
(see Note A)
CAMD
Command
Operand 1
Operand 2
RCA
ALTCH
RAS
CAS
WE
TR / QE
SF
DDIN
DDOUT
LRDY
PGMD
SIZE16
BUSFLT
R0
R1
NOTE A: LAD (SMJ34020A): Output to LAD by the SMJ34020A
Command:
Coprocessor ID, instruction and status code present on LAD
Operand n:
Data to or from the coprocessor
Figure 32. Transfer SMJ34020A Register(s) to Coprocessor (One or Two 32-Bit Values)
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