HD64F3687HV Datasheet, PDF (38/538 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 1 Overview
Subclock
generator
System
clock
generator
CPU
H8/300H
P10/TMOW
P11/PWM
P12
P14/IRQ0
P15/IRQ1/TMIB1
P16/IRQ2
P17/IRQ3/TRGV
P20/SCK3
P21/RXD
P22/TXD
P23
P24
P30
P31
P32
P33
P34
P35
P36
P37
P57/SCL
P56/SDA
P55/WKP5/ADTRG
P54/WKP4
P53/WKP3
P52/WKP2
P51/WKP1
P50/WKP0
Data bus (lower)
ROM
RAM
IIC2
RTC
14-bit
PWM
Timer Z
Timer V
SCI3
SCI3_2
Watchdog
timer
Timer B1
A/D converter
POR/LVD
(optional)
Data bus (upper)
Address bus
Port B
AVCC
P67/FTIOD1
P66/FTIOC1
P65/FTIOB1
P64/FTIOA1
P63/FTIOD0
P62/FTIOC0
P61/FTIOB0
P60/FTIOA0
P76/TMOV
P75/TMCIV
P74/TMRIV
P72/TXD_2
P71/RXD_2
P70/SCK3_2
P87
P86
P85
SDA
SCL
EEPROM
Note: The HD64N3687G is a stacked-structure product in which an EEPROM chip is mounted on the HD64F3687G (F-ZTAT^TM version).
The HD6483687G is a stacked-structure product in which an EEPROM chip is mounted on the HD6433687G (mask-ROM version).
Figure 1.2 Internal Block Diagram of H8/3687N (EEPROM Stacked Version)
Rev.5.00 Nov. 02, 2005 Page 4 of 500
REJ09B0027-0500