HD64F3687HV Datasheet, PDF (131/538 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 7 ROM
Table 7.2 Boot Mode Operation
Host Operation
Processing Contents
Communication Contents
LSI Operation
Processing Contents
Branches to boot program at reset-start.
Continuously transmits data H'00
at specified bit rate.
Transmits data H'55 when data H'00
is received error-free.
H'00, H'00 ^{. . .} H'00
H'00
H'55
Boot program initiation
• Measures low-level period of receive data
H'00.
• Calculates bit rate and sets BRR in SCI3.
• Transmits data H'00 to host as adjustment
end indication.
H'55 reception.
Boot program
erase error
H'AA reception
H'FF
H'AA
Checks flash memory data, erases all flash
memory blocks in case of written data
existing, and transmits data H'AA to host.
(If erase could not be done, transmits data
H'FF to host and aborts operation.)
Transmits number of bytes (N) of
programming control program to be
transferred as 2-byte data
(low-order byte following high-order
byte)
Transmits 1-byte of programming
control program (repeated for N times)
Upper bytes, lower bytes
Echoback
Echobacks the 2-byte data
received to host.
H'XX
Echoback
Echobacks received data to host and also
transfers it to RAM.
(repeated for N times)
H'AA reception
H'AA
Transmits data H'AA to host.
Branches to programming control program
transferred to on-chip RAM and starts
execution.
Rev.5.00 Nov. 02, 2005 Page 97 of 500
REJ09B0027-0500