HD64F3687HV Datasheet, PDF (284/538 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 13 Timer Z
TOCR has been set to H'06. Compare match B0 and compare match C0 are used. The FTIOB0 pin is in the 1 output state,
and is set to the toggle output or the 0 output by compare match B0.
When BCLR#2, @TOCR is executed to clear the TOC0 bit (the FTIOC0 signal is low) and compare match B0 occurs
at the same timing as shown below, the H'02 writing to TOCR has priority and compare match B0 does not drive the FTIOB0 signal low;
the FTIOB0 signal remains high.
Bit
7
6
5
4
3
2
1
0
TOCR
TOD1
Set value
0
TOC1
0
TOB1
0
TOA1
0
TOD0
0
TOC0
1
TOB0
1
TOA0
0
BCLR#2, @TOCR
(1) TOCR read operation: Read H'06
(2) Modify operation: Modify H'06 to H'02
(3) Write operation to TOCR: Write H'02
φ
TOCR
write signal
Compare match
signal B0
FTIOB0 pin
Expected output
Remains high because the 1 writing to TOB has priority
Figure 13.59 When Compare Match and Bit Manipulation Instruction to TOCR
Occur at the Same Timing
Rev.5.00 Nov. 02, 2005 Page 250 of 500
REJ09B0027-0500