HD64F3687HV Datasheet, PDF (339/538 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Vcc Vcc
Section 17 I²C Bus Interface 2 (IIC2)
SCL
SCL in
SCL out
SDA in
SDA out
SDA
(Master)
SCL in
SCL out
SCL in
SCL out
SCL
SDA
SDA in
SDA out
SDA in
SDA out
(Slave 1)
(Slave 2)
Figure 17.2 External Circuit Connections of I/O Pins
17.2 Input/Output Pins
Table 17.1 summarizes the input/output pins used by the I²C bus interface 2.
Table 17.1 I²C Bus Interface Pins
Name
Serial clock
Serial data
Abbreviation
I/O
SCL
I/O
SDA
I/O
Function
IIC serial clock input/output
IIC serial data input/output
17.3 Register Descriptions
The I²C bus interface 2 has the following registers:
• I²C bus control register 1 (ICCR1)
• I²C bus control register 2 (ICCR2)
• I²C bus mode register (ICMR)
• I²C bus interrupt enable register (ICIER)
• I²C bus status register (ICSR)
• I²C bus slave address register (SAR)
• I²C bus transmit data register (ICDRT)
Rev.5.00 Nov. 02, 2005 Page 305 of 500
REJ09B0027-0500