HD64F3687HV Datasheet, PDF (258/538 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 13 Timer Z
TCNT values
GRA_0
GRB_0
GRA_1
GRB_1
H'0000
TCNT_0 and GRA_0 are compared and their contents match
Time
FTIOB0
FTIOD0
FTIOA1
FTIOC1
FTIOB1
FTIOD1
FTIOC0
Figure 13.31 Example of Complementary PWM Mode Operation (1)
Figure 13.32 (1) and (2) show examples of PWM waveform output with 0% duty and 100% duty
in complementary PWM mode (for one phase).
• TPSC2 = TPSC1 = TPSC0 = 0
Set GRB_0 to H'0000 or a value equal to or more than GRA_0. The waveform with a duty
cycle of 0% and 100% can be output. When buffer operation is used together, the duty cycles
can easily be changed, including the above settings, during operation. For details on buffer
operation, refer to section 13.4.8, Buffer Operation.
• Other than TPSC2 = TPSC1 = TPSC0 = 0
Set GRB_0 to satisfy the following expression: GRA_0 + 1 < GRB_0 < H'FFFF. The
waveform with a duty cycle of 0% and 100% can be output. For details on 0%- and 100%-duty
cycle waveform output, see 3. C., Outputting a waveform with a duty cycle of 0% and 100% in
section 13.4.7.
Rev.5.00 Nov. 02, 2005 Page 224 of 500
REJ09B0027-0500