HD64F3687HV Datasheet, PDF (189/538 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 11 Timer B1
11.3.1 Timer Mode Register B1 (TMB1)
TMB1 selects the auto-reload function and input clock.
Initial
Bit
Bit Name Value
7
TMB17 0
6 to 3 
All 1
2
TMB12 0
1
TMB11 0
0
TMB10 0
R/W
R/W

R/W
R/W
R/W
Description
Auto-reload function select
0: Interval timer function selected
1: Auto-reload function selected
Reserved
These bits are always read as 1.
Clock select
000: Internal clock: φ/8192
001: Internal clock: φ/2048
010: Internal clock: φ/512
011: Internal clock: φ/256
100: Internal clock: φ/64
101: Internal clock: φ/16
110: Internal clock: φ/4
111: External event (TMIB1): rising or falling edge*
Note: * The edge of the external event signal is selected
by bit IEG1 in the interrupt edge select register 1
(IEGR1). See section 3.2.1, Interrupt Edge
Select Register 1 (IEGR1), for details. Before
setting TMB12 to TMB10 to 1, IRQ1 in the port
mode register 1 (PMR1) should be set to 1.
11.3.2 Timer Counter B1 (TCB1)
TCB1 is an 8-bit read-only up-counter, which is incremented by internal clock input. The clock
source for input to this counter is selected by bits TMB12 to TMB10 in TMB1. TCB1 values can
be read by the CPU at any time. When TCB1 overflows from H'FF to H'00 or to the value set in
TLB1, the IRRTB1 flag in IRR2 is set to 1. TCB1 is allocated to the same address as TLB1. TCB1
is initialized to H'00.
Rev.5.00 Nov. 02, 2005 Page 155 of 500
REJ09B0027-0500