HD64F3687HV Datasheet, PDF (227/538 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 13 Timer Z
TIORC: TIORC selects whether GRC or GRD is used as an output compare register or an input
capture register. When an output compare register is selected, the output setting is selected. When
an input capture register is selected, an input edge of an input capture signal is selected. TIORC
also selects the function of FTIOC or FTIOD pin.
Initial
Bit
Bit Name value
7

1
6
IOD2
0
5
IOD1
0
4
IOD0
0
3

1
2
IOC2
0
1
IOC1
0
0
IOC0
0
Legend: X: Don't care
R/W Description

Reserved
This bit is always read as 1.
R/W I/O Control D2 to D0
R/W GRD is an output compare register:
R/W 000: Disables pin output by compare match
001: 0 output by GRD compare match
010: 1 output by GRD compare match
011: Toggle output by GRD compare match
GRD is an input capture register:
100: Input capture to GRD at the rising edge
101: Input capture to GRD at the falling edge
11X: Input capture to GRD at both rising and falling
edges

Reserved
This bit is always read as 1.
R/W I/O Control C2 to C0
R/W GRC is an output compare register:
R/W 000: Disables pin output by compare match
001: 0 output by GRC compare match
010: 1 output by GRC compare match
011: Toggle Output by GRC compare match
GRC is an input capture register:
100: Input capture to GRC at the rising edge
101: Input capture to GRC at the falling edge
11X: Input capture to GRC at both rising and falling
edges
Rev.5.00 Nov. 02, 2005 Page 193 of 500
REJ09B0027-0500