HD64F3687HV Datasheet, PDF (299/538 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 16 Serial Communication Interface 3 (SCI3)
Initial
Bit
Bit Name Value R/W Description
1
CKS1
0
R/W Clock Select 0 and 1
0
CKS0
0
R/W These bits select the clock source for the baud rate
generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relationship between the bit rate register setting
and the baud rate, see section 16.3.8, Bit Rate Register
(BRR). n is the decimal representation of the value of n in
BRR (see section 16.3.8, Bit Rate Register (BRR)).
16.3.6 Serial Control Register 3 (SCR3)
SCR3 is a register that enables or disables SCI3 transfer operations and interrupt requests, and is
also used to select the transfer clock source. For details on interrupt requests, refer to section 16.7,
Interrupts.
Initial
Bit
Bit Name Value R/W Description
7
TIE
0
R/W Transmit Interrupt Enable
When this bit is set to 1, the TXI interrupt request is
enabled.
6
RIE
0
R/W Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt requests
are enabled.
5
TE
0
R/W Transmit Enable
When this bit s set to 1, transmission is enabled.
4
RE
0
R/W Receive Enable
When this bit is set to 1, reception is enabled.
Rev.5.00 Nov. 02, 2005 Page 265 of 500
REJ09B0027-0500