HD64F3687HV Datasheet, PDF (127/538 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 7 ROM
7.2.3 Erase Block Register 1 (EBR1)
EBR1 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Do not set more than one bit at a time, as this will cause all the bits in EBR1 to
be automatically cleared to 0.
Initial
Bit
Bit Name Value R/W Description
7

0

Reserved
This bit is always read as 0.
6
EB6
0
R/W When this bit is set to 1, 8 bytes of H'C000 to H'DFFF will
be erased.
5
EB5
0
R/W When this bit is set to 1, 16 bytes of H'8000 to H'BFFF
will be erased.
4
EB4
0
R/W When this bit is set to 1, 28 kbytes of H'1000 to H'7FFF
will be erased.
3
EB3
0
R/W When this bit is set to 1, 1 kbyte of H'0C00 to H'0FFF will
be erased.
2
EB2
0
R/W When this bit is set to 1, 1 kbyte of H'0800 to H'0BFF will
be erased.
1
EB1
0
R/W When this bit is set to 1, 1 kbyte of H'0400 to H'07FF will
be erased.
0
EB0
0
R/W When this bit is set to 1, 1 kbyte of H'0000 to H'03FF will
be erased.
Rev.5.00 Nov. 02, 2005 Page 93 of 500
REJ09B0027-0500