SAA7118 Datasheet, PDF (97/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input

SUB
REGISTER FUNCTION
ADDR.
D7
D6
(HEX)
Reserved
37
(1)
(1)
Clock ratio AMXCLK to ASCLK
38
(1)
(1)
Clock ratio ASCLK to ALRCLK
39
(1)
(1)
Audio clock generator basic
3A
(1)
(1)
setup
Reserved
3B to 3F
(1)
(1)
General purpose VBI-data slicer part: registers 40H to 7FH
Slicer control 1
40
(1)
HAM_N
LCR2 to LCR24 (n = 2 to 24) 41 to 57 LCRn_7 LCRn_6
Programmable framing code
58
FC7
FC6
Horizontal offset for slicer
59
HOFF7 HOFF6
Vertical offset for slicer
5A
VOFF7
VOFF6
Field offset and MSBs for
horizontal and vertical offset
5B
FOFF RECODE
Reserved (for testing)
5C
(1)
(1)
Header and data identification
5D
FVREF
(1)
(DID) code control
Sliced data identification (SDID) 5E
(1)
(1)
code
Reserved
5F
(1)
(1)
Slicer status byte 0 (read only)
60
−
FC8V
Slicer status byte 1 (read only)
61
−
−
Slicer status byte 2 (read only)
62
LN3
LN2
Reserved
63 to 7F
(1)
(1)
X-port, I-port and the scaler part: registers 80H to EFH
TASK INDEPENDENT GLOBAL SETTINGS: 80H TO 8FH
Global control 1
80
(1)
Reserved
81 and
(1)
82
SMOD
(1)
D5
(1)
SDIV5
LRDIV5
(1)
(1)
FCE
LCRn_5
FC5
HOFF5
VOFF5
(1)
(1)
DID5
SDID5
(1)
FC7V
F21_N
LN1
(1)
TEB
(1)
D4
(1)
SDIV4
LRDIV4
(1)
(1)
HUNT_N
LCRn_4
FC4
HOFF4
VOFF4
VOFF8
(1)
DID4
SDID4
(1)
VPSV
LN8
LN0
(1)
TEA
(1)
D3
(1)
SDIV3
LRDIV3
APLL
(1)
(1)
LCRn_3
FC3
HOFF3
VOFF3
(1)
(1)
DID3
SDID3
(1)
PPV
LN7
DT3
(1)
ICKS3
(1)
D2
(1)
SDIV2
LRDIV2
AMVR
(1)
(1)
LCRn_2
FC2
HOFF2
VOFF2
HOFF10
(1)
DID2
SDID2
(1)
CCV
LN6
DT2
(1)
ICKS2
(1)
D1
(1)
SDIV1
LRDIV1
LRPH
(1)
(1)
LCRn_1
FC1
HOFF1
VOFF1
HOFF9
(1)
DID1
SDID1
(1)
−
LN5
DT1
(1)
ICKS1
(1)
D0
(1)
SDIV0
LRDIV0
SCPH
(1)
(1)
LCRn_0
FC0
HOFF0
VOFF0
HOFF8
(1)
DID0
SDID0
(1)
−
LN4
DT0
(1)
ICKS0
(1)