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SAA7118 Datasheet, PDF (84/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input
Philips Semiconductors
Multistandard video decoder with adaptive
comb filter and component video input
Preliminary specification
SAA7118
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
9-bit analog-to-digital converters
B
analog bandwidth at −3 dB
−
7
φdiff
differential phase amplifier plus anti-alias filter
−
2
bypassed
Gdiff
differential gain amplifier plus anti-alias filter
−
2
bypassed
fclk(ADC)
ADC clock
frequency
25.4
−
LEdc(d)
DC differential
linearity error
−
0.7
LEdc(i)
DC integral
linearity error
−
1
∆GADC
ADC gain
inequality


m-m-----ai--n-x--i-im-m----u-u---m-m-----d-d---e-e--v-v--i-ia-a---t-t-ii-o-o--n-n--
–
1
×
100
;
−
3
note 1
Digital inputs
VIL(SCL,SDA)
LOW-level input
voltage pins SDA
and SCL
note 2
VIH(SCL,SDA)
HIGH-level input
voltage pins SDA
and SCL
note 2
VIL(XTALI)
LOW-level CMOS
input voltage pin
XTALI
VIH(XTALI)
HIGH-level CMOS
input voltage pin
XTALI
VIL(n)
LOW-level input
voltage all other
inputs
VIH(n)
HIGH-level input
voltage all other
inputs
ILI
input leakage
current
ILI/O
I/O leakage
current
Ci
input capacitance I/O at high-impedance
−0.5
−
0.7VDD(I2C) −
−0.3
−
2.0
−
−0.3
−
2.0
−
−
−
−
−
−
−
MAX.
UNIT
−
MHz
−
deg
−
%
28.6
MHz
−
LSB
−
LSB
−
%
+0.3VDD(I2C) V
VDD(I2C) + 0.5 V
+0.8
V
VDDD + 0.3 V
+0.8
V
5.5
V
1
µA
10
µA
8
pF
2001 May 30
84