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SAA7118 Datasheet, PDF (140/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input | |||
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Philips Semiconductors
Multistandard video decoder with adaptive
comb ï¬lter and component video input
Preliminary speciï¬cation
SAA7118
15.6.5 SUBADDRESS 5AH
Table 86 Vertical offset for slicer; slicer set 5AH and 5BH
VERTICAL OFFSET
Minimum value 0
Maximum value 312
Value for 50 Hz 625 lines input
Value for 60 Hz 525 lines input
CONTROL BIT 5BH[4]
VOFF8
0
1
0
0
CONTROL BITS 5AH[7:0]
VOFF[7:0]
00H
38H
03H
06H
15.6.6 SUBADDRESS 5BH
Table 87 Field offset, and MSBs for horizontal and vertical offsets; slicer set 5BH[7:6]
See Sections 15.6.4 and 15.6.5 for HOFF[10:8] 5BH[2:0] and VOFF8[5BH[4]].
BIT DESCRIPTION SYMBOL VALUE
FUNCTION
D7 ï¬eld offset
FOFF
0
no modiï¬cation of internal ï¬eld indicator (default for 50 Hz
625 lines input sources)
1
invert ï¬eld indicator (default for 60 Hz 525 lines input sources)
D6 recode
RECODE
0
leave data unchanged (default)
1
convert 00H and FFH data bytes into 03H and FCH
15.6.7 SUBADDRESS 5DH
Table 88 Header and data identiï¬cation (DID; ITU 656) code control; slicer set 5DH[7:0]
BIT
DESCRIPTION
SYMBOL VALUE
FUNCTION
D7 ï¬eld ID and V-blank selection FVREF
for text output (F and V
reference selection)
0 F and V output of slicer is LCR table dependent
1 F and V output is taken from decoder real-time signals
EVEN_ITU and VBLNK_ITU
D[5:0] default; DID[5:0] = 00H
DID[5:0] 00 0000 ANC header framing; see Fig.37 and Table 21
special cases of DID
programming
11 1110 DID[5:0] = 3EH SAV/EAV framing, with FVREF = 1
11 1111 DID[5:0] = 3FH SAV/EAV framing, with FVREF = 0
15.6.8 SUBADDRESS 5EH
Table 89 Sliced data identiï¬cation (SDID) code; slicer set 5EH[5:0]
BIT
DESCRIPTION
D[5:0] SDID codes
SYMBOL VALUE
SDID[5:0] 00H default
FUNCTION
2001 May 30
140
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