SAA7118 Datasheet, PDF (144/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input

Philips Semiconductors
Multistandard video decoder with adaptive
comb filter and component video input
Preliminary specification
SAA7118
Table 99 X-port signal definitions text slicer; global set 85H[7:5]
X = don’t care.
X-PORT SIGNAL DEFINITIONS TEXT SLICER
Video data limited to range 1 to 254
Video data limited to range 8 to 247
Dword byte swap, influences serial output timing
D0 D1 D2 D3 ⇒ FF 00 00 SAV C_B0 Y0 C_R0 Y1
D1 D0 D3 D2 ⇒ 00 FF SAV 00 Y0 C_B0 Y1 C_R0
D2 D3 D0 D1 ⇒ 00 SAV FF 00 C_R0 Y1 C_B0 Y0
D3 D2 D1 D0 ⇒ SAV 00 00 FF Y1 C_R0 Y0 C_B0
Table 100 I-port reference signal polarities; global set 85H[4:0]
X = don’t care.
I-PORT REFERENCE SIGNAL POLARITIES
IDQ at default polarity (1 = active)
IDQ is inverted
IGPH at default polarity (1 = active)
IGPH is inverted
IGPV at default polarity (1 = active)
IGPV is inverted
IGP1 at default polarity
IGP1 is inverted
IGP0 at default polarity
IGP0 is inverted
IGP0P
X
X
X
X
X
X
X
X
0
1
Table 101 I-port FIFO flag control and arbitration; global set 86H[7:4]
X = don’t care.
FUNCTION
See subaddress 84H: IDG11 and IDG10
See subaddress 84H: IDG01 and IDG00
I-port signal definitions
I-port data output inhibited
Only video data is transferred
Only text data is transferred (no EAV, SAV will occur)
Text and video data is transferred, text has priority
CONTROL BITS D7 TO D5
ISWP1
X
X
0
ISWP0
X
X
0
ILLV
0
1
X
0
1
X
1
0
X
1
1
X
CONTROL BITS D4 TO D0
IGP1P
X
X
X
X
X
X
0
1
X
X
IGVP
X
X
X
X
0
1
X
X
X
X
IGHP
X
X
0
1
X
X
X
X
X
X
IDQP
0
1
X
X
X
X
X
X
X
X
CONTROL BITS D7 TO D4
VITX1 VITX0 IDG02 IDG12
X
X
X
0
X
X
X
1
X
X
0
X
X
X
1
X
0
0
X
X
0
1
X
X
1
0
X
X
1
1
X
X
2001 May 30
144