SAA7118 Datasheet, PDF (85/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input

Philips Semiconductors
Multistandard video decoder with adaptive
comb filter and component video input
Preliminary specification
SAA7118
SYMBOL
PARAMETER
CONDITIONS
Digital outputs; note 3
V_OL(SDA)
V_OL(clk)
V_OH(clk)
V_OL(n)
V_OH(n)
LOW-level output
voltage pin SDA
LOW-level output
voltage for clocks
HIGH-level output
voltage for clocks
LOW-level output
voltage all other
digital outputs
HIGH-level output
voltage all other
digital outputs
SDA at 3 mA sink current
Clock output timing (LLC and LLC2); note 4
C_L
T_cy
δ
t_r
t_f
t_d(LLC-LLC2)
output load
capacitance
cycle time
duty factors for
t_LLCH/t_LLC and
t_LLC2H/t_LLC2
rise time LLC and
LLC2
fall time LLC and
LLC2
delay time
between LLC and
LLC2 output
pin LLC
pin LLC2
C_L = 40 pF
0.2 V to V_DDD − 0.2 V
V_DDD − 0.2 V to 0.2 V
measured at 1.5 V; C_L = 25 pF
Horizontal PLL
f_hor(n)
∆f_hor/f_hor(n)
nominal line
frequency
permissible static
deviation
50 Hz field
60 Hz field
Subcarrier PLL
f_sc(n)
∆f_sc
nominal subcarrier PAL BGHI
frequency
NTSC M
PAL M
PAL N
lock-in range
MIN.
−
−0.5
2.4
0
2.4
15
35
70
40
−
−
−4
−
−
−
−
−
−
−
±400
TYP.
MAX.
−
0.4
−
+0.6
−
V_DDD + 0.5
−
0.4
−
V_DDD + 0.5
−
50
−
39
−
78
−
60
−
5
−
5
−
+8
15625 −
15734 −
−
5.7
4433619 −
3579545 −
3575612 −
3582056 −
−
−
UNIT
V
V
V
V
V
pF
ns
ns
%
ns
ns
ns
Hz
Hz
%
Hz
Hz
Hz
Hz
Hz
2001 May 30
85