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| SAA7118 Datasheet, PDF (103/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input | |||
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Philips Semiconductors
Multistandard video decoder with adaptive
comb ï¬lter and component video input
Preliminary speciï¬cation
SAA7118
15.2 I2C-bus details
15.2.1 SUBADDRESS 00H
Table 38 Chip Version (CV) identiï¬cation; 00H[7:4]; read only register
FUNCTION
Chip Version (CV)
LOGIC LEVELS
ID7
ID6
ID5
ID4
CV3
CV2
CV1
CV0
15.2.2 SUBADDRESS 01H
The programming of the horizontal increment delay is used to match internal processing delays to the delay of the ADC.
Use recommended position only.
Table 39 Horizontal increment delay; 01H[6:0]
BIT
DESCRIPTION
D6 white peak control off
SYMBOL
WPOFF(1)
D[5:4] update hysteresis for 9-bit
gain (see Fig.9)
GUDL[1:0]
D[3:0] increment delay
IDEL[3:0]
VALUE
0
1
00
01
10
11
1111
1110
0111
0000
FUNCTION
white peak control active (AD signal is
attenuated, if nominal luminance
output white level is exceeded)
white peak control disabled
off
±1 LSB
±2 LSB
±3 LSB
no update
minimum delay
recommended position
maximum delay
Note
1. HLNRS = 1 should not be used in combination with WPOFF = 0.
2001 May 30
103
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