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SAA7118 Datasheet, PDF (51/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input | |||
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Philips Semiconductors
Multistandard video decoder with adaptive
comb ï¬lter and component video input
Preliminary speciï¬cation
SAA7118
8.4.2 HORIZONTAL SCALING
The overall horizontal required scaling factor has to be split
into a binary and a rational value according to the
equation:
H-scale ratio = o--i--nu---pt--p-u--u--t--t-p--p-i--xi--x-e--e-l--l
H-scale ratio = X-----P----S----C1----[--5---:--0---] Ã X-----S----C-1---Y0---2-[--1-4--2---:--0---]
where the parameter of prescaler XPSC[5:0] = 1 to 63 and
the parameter of VPD phase interpolation
XSCY[12:0] = 300 to 8191 (0 to 299 are only theoretical
values). For example, 1â3.5 is to split in 1â4 Ã 1.14286. The
binary factor is processed by the prescaler, the arbitrary
non-integer ratio is achieved via the variable phase delay
VPD circuitry, called horizontal fine scaling. The latter
calculates horizontally interpolated new samples with a
6-bit phase accuracy, which relates to less than 1 ns jitter
for regular sampling scheme. Prescaler and fine scaler
create the horizontal scaler of the SAA7118.
Using the accumulation length function of the prescaler
(XACL[5:0] A1H[5:0]), application and destination
dependent (e.g. scale for display or for a compression
machine), a compromise between visible bandwidth and
alias suppression can be determined.
8.4.2.1 Horizontal prescaler (subaddresses
A0H to A7H and D0H to D7H)
The prescaling function consists of an FIR anti-alias filter
stage and an integer prescaler, which creates an adaptive
prescale dependent low-pass filter to balance sharpness
and aliasing effects.
The FIR prefilter stage implements different low-pass
characteristics to reduce alias for downscales in the range
of 1 to 1â2. A CIF optimized filter is built-in, which reduces
artefacts for CIF output formats (to be used in combination
with the prescaler set to 1â2 scale); see Table 11.
The function of the prescaler is defined by:
⢠An integer prescaling ratio XPSC[5:0] A0H[5:0] (equals
1 to 63), which covers the integer downscale
range 1 to 1â63
⢠An averaging sequence length XACL[5:0] A1H[5:0]
(equals 0 to 63); range 1 to 64
⢠A DC gain renormalization XDCG[2:0] A2H[2:0];
1 down to 1â128
⢠The bit XC2_1[A2H[3]], which defines the weighting of
the incoming pixels during the averaging process:
â XC2_1 = 0 â 1 + 1...+ 1 +1
â XC2_1 = 1 â 1 + 2...+ 2 +1
The prescaler creates a prescale dependent FIR low-pass,
with up to (64 + 7) filter taps. The parameter XACL[5:0]
can be used to vary the low-pass characteristic for a given
integer prescale of 1âXPSC[5:0]. The user can therefore
decide between signal bandwidth (sharpness impression)
and alias.
Equation for XPSC[5:0] calculation is:
XPSC[5:0] = lower integer ofN--N---p--p-i--xi-x--_-_--o--i-nu----t
where,
the range is 1 to 63 (value 0 is not allowed);
Npix_in = number of input pixel, and
Npix_out = number of desired output pixel over the
complete horizontal scaler.
The use of the prescaler results in a XACL[5:0] and
XC2_1 dependent gain amplification. The amplification
can be calculated according to the equation:
DC gain = [(XACL[5:0] â XC2_1) + 1] Ã (XC2_1 + 1)
It is recommended to use sequence lengths and weights,
which results in a 2N DC gain amplification, as these
amplitudes can be renormalized by the XDCG[2:0]
controlled 2--1--N-- shifter of the prescaler.
The renormalization range of XDCG[2:0] is 1, 1â2... down
to 1â128.
Other amplifications have to be normalized by using the
following BCS control circuitry. In these cases the
prescaler has to be set to an overall gain of â¤1, e.g. for an
accumulation sequence of â1 + 1 + 1â (XACL[5:0] = 2 and
XC2_1 = 0), XDCG[2:0] must be set to â010â, this equals 1â4
and the BCS has to amplify the signal to 4â3 (SATN[7:0]
and CONT[7:0] value = lower integer of 4â3 Ã 64).
The use of XACL[5:0] is XPSC[5:0] dependent.
XACL[5:0] must be <2 Ã XPSC[5:0].
XACL[5:0] can be used to find a compromise between
bandwidth (sharpness) and alias effects.
2001 May 30
51
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