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SAA7118 Datasheet, PDF (141/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input | |||
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Philips Semiconductors
Multistandard video decoder with adaptive
comb ï¬lter and component video input
Preliminary speciï¬cation
SAA7118
15.6.9 SUBADDRESS 60H
Table 90 Slicer status byte 0; 60H[6:2]; read only register
BIT
DESCRIPTION
D6 framing code valid
D5 framing code valid
D4 VPS valid
D3 PALplus valid
D2 closed caption valid
SYMBOL VALUE
FUNCTION
FC8V
0 no framing code (0 error) in the last frame detected
1 framing code with 0 error detected
FC7V
0 no framing code (1 error) in the last frame detected
1 framing code with 1 error detected
VPSV
0 no VPS in the last frame
1 VPS detected
PPV
0 no PALplus in the last frame
1 PALplus detected
CCV
0 no closed caption in the last frame
1 closed caption detected
15.6.10 SUBADDRESSES 61H AND 62H
Table 91 Slicer status byte 1; 61H[5:0] and slicer status byte 2; 62H[7:0]; read only registers
SUBADDRESS
61H
62H
BIT
D5
D[4:0]
D[7:4]
D[3:0]
SYMBOL
F21_N
LN[8:4]
LN[3:0]
DT[3:0]
DESCRIPTION
ï¬eld ID as seen by the VBI slicer; for ï¬eld 1: D5 = 0
line number
data type; according to Table 15
15.7 Programming register interfaces and scaler part
15.7.1 SUBADDRESS 80H
Table 92 Global control 1; global set 80H[6:4]
SWRST moved to subaddress 88H[5]; X = donât care.
TASK ENABLE CONTROL
Task of register set A is disabled
Task of register set A is enabled
Task of register set B is disabled
Task of register set B is enabled
The scaler window deï¬nes the F and V timing of the scaler output
VBI-data slicer deï¬nes the F and V timing of the scaler output
CONTROL BITS D6 TO D4
SMOD
X
X
X
X
0
1
TEB
X
X
0
1
X
X
TEA
0
1
X
X
X
X
2001 May 30
141
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