SAA7118 Datasheet, PDF (15/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input

Table 2 8-bit/16-bit and alternative pin functional configurations
PIN⁽¹⁾
8-BIT
SYMBOL INPUT
MODES
C11,
A11,
B10,
A10, B9,
A9, B8,
A8 (127,
128, 130,
131, 134,
135, 138,
139)
XPD7 to
XPD0
A7 (143) XCLK
D1 data
input
clock
input
B7 (144) XDQ
data
qualifier
input
A6 (146) XRDY
C7 (141) XRH
D8 (140) XRV
B11
(126)
XTRI
input
ready
output
horizontal
reference
input
vertical
reference
input
output
enable
input
16-BIT INPUT
MODES (ONLY
FOR I²C-BUS
PROGRAMMING)
Y data input
ALTERNATIVE
INPUT
FUNCTIONS
gated clock
input
active task A/B
flag
8-BIT
OUTPUT
MODES
D1
decoder
output
decoder
clock
output
data
qualifier
output
(HREF and
VREF
gate)
decoder
horizontal
reference
output
decoder
vertical
reference
output
16-BIT OUTPUT
MODES (ONLY
FOR I²C-BUS
PROGRAMMING)
ALTERNATIVE
OUTPUT
FUNCTIONS
I/O
CONFIGURATION
PROGRAMMING
BITS
XCODE[92H[3]]
XPE[1:0] 83H[1:0]
+ pin XTRI
XPE[1:0] 83H[1:0]
+ pin XTRI
XPCK[1:0] 83H[5:4]
XCKS[92H[0]]
XDQ[92H[1]]
XPE[1:0] 83H[1:0]
+ pin XTRI
XRQT[83H[2]]
XPE[1:0] 83H[1:0]
+ pin XTRI
XDH[92H[2]]
XPE[1:0] 83H[1:0]
+ pin XTRI
XDV[1:0] 92H[5:4]
XPE[1:0] 83H[1:0]
+ pin XTRI
XPE[1:0] 83H[1:0]