SAA7118 Datasheet, PDF (163/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input

Philips Semiconductors
Multistandard video decoder with adaptive
comb filter and component video input
Preliminary specification
SAA7118
Table 144 Scaler and interface configuration example
I²C-BUS
ADDRESS
(HEX)
MAIN FUNCTIONALITY
EXAMPLE 1 EXAMPLE 2 EXAMPLE 3 EXAMPLE 4
HEX DEC HEX DEC HEX DEC HEX DEC
Global settings
80
task enable, IDQ and back-end clock
definition
83
XCLK output phase and X-port output
enable
84
IGPH, IGPV, IGP0 and IGP1 output
definition
85
signal polarity control and I-port byte
swapping
86
FIFO flag thresholds and video/text
arbitration
87
ICLK and IDQ output phase and I-port
enable
88
power save control and software reset
10
− 10 − 10 − 10 −
01
− 01 − 00 − 00 −
A0
− C5 − A0 − A0 −
10
− 09 − 10 − 10 −
45
− 40 − 45 − 45 −
01
− 01 − 01 − 01 −
F0
− F0 − F0 − F0 −
Task A: scaler input configuration and output format settings
90
task handling
00
− 00 − 00 − 00 −
91
scaler input source and format definition
92
reference signal definition at scaler input
08
− 08 − 18 − 38 −
10
− 10 − 10 − 10 −
93
I-port output formats and configuration
80
− 40 − 80 − 84 −
Input and output window definition
94
horizontal input offset (XO)
10 16 10 16 10 16 10 16
95
00
− 00 − 00 − 00 −
96
horizontal input (source) window length (XS) D0 720 C0 704 D0 720 D0 720
97
02
− 02 − 02 − 02 −
98
vertical input offset (YO)
0A 10 0A 10 0A 10 0A 10
99
00
− 00 − 00 − 00 −
9A
vertical input (source) window length (YS)
F2 242 22 290 F2 242 22 290
9B
00
− 01 − 00 − 01 −
9C
horizontal output (destination) window
9D
length (XD)
D0 720 00 768 60 352 C8 200
02
− 03 − 01 − 00 −
9E
vertical output (destination) window
9F
length (YD)
F0 240 20 288 20 288 50 80
00
− 01 − 01 − 00 −
2001 May 30
163