SAA7118 Datasheet, PDF (132/169 Pages) NXP Semiconductors – Multistandard video decoder with adaptive comb filter and component video input

Philips Semiconductors
Multistandard video decoder with adaptive
comb filter and component video input
Preliminary specification
SAA7118
15.2.24 SUBADDRESS 17H
Table 62 Miscellaneous/VGATE MSBs; 17H[7:0]
BIT
DESCRIPTION
SYMBOL VALUE
FUNCTION
D7 LLC output enable
LLCE
0 enable
1 3-state
D6 LLC2 output enable
LLC2E
0 enable
1 3-state
D[5:3] standard detection search LATY[2:0] 000 reserved
loop latency
001 one field
010 two fields
011 three fields; recommended setting
... ... to ...
111 seven fields
D2 alternative VGATE
position
VGPS
0 VGATE position according to Tables 60 and 61
1 VGATE occurs one line earlier during field 2
D1 MSB VGATE stop
VSTO8
see Table 61
D0 MSB VGATE start
VSTA8
see Table 60
15.2.25 SUBADDRESS 18H
Table 63 Raw data gain control; RAWG[7:0] 18H[7:0]; see Fig.20
GAIN
255 (double amplitude)
128 (nominal level)
0 (off)
CONTROL BITS D7 TO D0
RAWG7 RAWG6 RAWG5 RAWG4 RAWG3 RAWG2 RAWG1 RAWG0
0
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15.2.26 SUBADDRESS 19H
Table 64 Raw data offset control; RAWO[7:0] 19H[7:0]; see Fig.20
OFFSET
−128 LSB
0 LSB
+128 LSB
RAWO7
0
1
1
RAWO6
0
0
1
CONTROL BITS D7 TO D0
RAWO5 RAWO4 RAWO3 RAWO2
0
0
0
0
0
0
0
0
1
1
1
1
RAWO1
0
0
1
RAWO0
0
0
1
2001 May 30
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