F81866A Datasheet, PDF (91/210 Pages) Feature Integration Technology Inc. – 6 UARTs Super IO With 128 Bytes FIFO and Power

F81866A
6.6.2.2GPIO1x
Pin
Name
G3 -> S5
PIN STATUS
S0
S3
S5
Register
Power
Well
Register
Reset Signal
Pin
Power
Well
65
GPIO10
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
66
GPIO11
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
67
GPIO12
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
68
GPIO13
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
69
GPIO14
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
70
GPIO15
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
71
GPIO16
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
72
GPIO17
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
6.6.2.3GPIO2x
Pin
Name
G3 -> S5
PIN STATUS
S0
S3
S5
Register
Power
Well
Register
Reset Signal
Pin
Power
Well
76
GPIO20
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
77
GPIO21
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
78
GPIO22
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
79
GPIO23
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
80
GPIO24
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
81
GPIO25
Z
user define user define user define I_VSB3V
5VSB
I_VSB3V
82
GPIO26
L
user define user define user define I_VSB3V
5VSB
VBAT
83
GPIO27
L
user define user define user define I_VSB3V
5VSB
VBAT
* GPIO26 and GPIO27 have no push pull function.
6.6.2.4GPIO3x
Pin
Name
G3 -> S5
PIN STATUS
S0
S3
36
GPIO30
Z
user define
Z
37
GPIO31
Z
user define
Z
38
GPIO32
Z
user define
Z
39
GPIO33
Z
user define
Z
40
GPIO34
Z
user define
Z
41
GPIO35
Z
user define
Z
42
GPIO36
Z
user define
Z
43
GPIO37
Z
user define
Z
S5
Register
Power
Well
Register
Reset Signal
Pin
Power
Well
Z
I_VSB3V LRESET# 3VCC
Z
I_VSB3V LRESET# 3VCC
Z
I_VSB3V LRESET# 3VCC
Z
I_VSB3V LRESET# 3VCC
Z
I_VSB3V LRESET# 3VCC
Z
I_VSB3V LRESET# 3VCC
Z
I_VSB3V LRESET# 3VCC
Z
I_VSB3V LRESET# 3VCC
91
Jan, 2012
V0. 12P