F81866A Datasheet, PDF (158/210 Pages) Feature Integration Technology Inc. – 6 UARTs Super IO With 128 Bytes FIFO and Power

6
GPIO56_ST
R
-
- The pin status of GPIO56/HDSEL#/DTR6#.
5
GPIO55_ST
R
-
- The pin status of GPIO55/STEP#/CTS6#.
4
GPIO54_ST
R
-
- The pin status of GPIO54/DIR#/RI6#.
3
GPIO53_ST
R
-
- The pin status of GPIO53/WDATA#/DCD6#.
2
GPIO52_ST
R
-
- The pin status of GPIO52/DRVA#/SOUT6.
1
GPIO51_ST
R
-
- The pin status of GPIO51/MOA#/SIN6.
0
GPIO50_ST
R
-
- The pin status of GPIO50/DENSEL#/RTS6#.
F81866A
7.7.9.4GPIO5 Drive Enable Register ⎯ Index A3h
Bit
Name
R/W Reset Default
GPIO57 Drive Enable.
7 GPIO57_DRV_EN R/W LRESET# 0 0: GPIO57 is open drain.
1: GPIO57 is push pull.
GPIO56 Drive Enable.
6 GPIO56_DRV_EN R/W LRESET# 0 0: GPIO56 is open drain.
1: GPIO56 is push pull.
GPIO55 Drive Enable.
5 GPIO55_DRV_EN R/w LRESET# 0 0: GPIO55 is open drain.
1: GPIO55 is push pull.
GPIO54 Drive Enable.
4 GPIO54_DRV_EN R/W LRESET# 0 0: GPIO54 is open drain.
1: GPIO54 is push pull.
GPIO53 Drive Enable.
3 GPIO53_DRV_EN R/W LRESET# 0 0: GPIO53 is open drain.
1: GPIO53 is push pull.
GPIO52 Drive Enable.
2 GPIO52_DRV_EN R/W LRESET# 0 0: GPIO52 is open drain.
1: GPIO52 is push pull.
GPIO51 Drive Enable.
1 GPIO51_DRV_EN R/W LRESET# 0 0: GPIO51 is open drain.
1: GPIO51 is push pull.
GPIO50 Drive Enable.
0 GPIO50_DRV_EN R/W LRESET# 0 0: GPIO50 is open drain.
1: GPIO50 is push pull.
Description
7.7.9.5GPIO5 SMI Enable Register ⎯ Index A8h
Bit
Name
R/W Reset Default
Description
0: Disable SMI event.
7 GPIO57_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO57_SMI_ST is set.
0: Disable SMI event.
6 GPIO56_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO56_SMI_ST is set.
0: Disable SMI event.
5 GPIO55_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO55_SMI_ST is set.
158
Jan, 2012
V0. 12P