F81866A Datasheet, PDF (203/210 Pages) Feature Integration Technology Inc. – 6 UARTs Super IO With 128 Bytes FIFO and Power

RI1#
DTR1#
CTS1#
SOUT1
RTS1#
SIN1
DSR1#
DCD1#
VCC5V
RI2#
DTR2#
CTS2#
SOUT2
RTS2#
SIN2
DSR2#
DCD2#
VCC5V
RI3#
DTR3#
CTS3#
SOUT3
RTS3#
SIN3
DSR3#
DCD3#
VCC5V
U2
11
GND
10
-12V
12
13
14
RY5
DA3
15
16
17
18
RY4
DA2
DA1
RY3
19 ^{RY 2}
RY1
RA5
DY3
9
8
7
RA4
DY2
DY1
RA3
6
5
4
3
RA2 ₂
RA1
20 _+5V
+12V ¹
GD75323 (20-SSOP)
COM1
U4
11 _GND
-12V ¹⁰
12
13
14
15
16
17
RY5
DA3
RY4
DA2
DA1
18 ^{RY 3}
19
RY2
RY1
RA5
DY3
RA4
DY2
DY1
9
8
7
6
5
4
RA3 ₃
RA2
RA1
2
20 _+5V
+12V ¹
GD75323 (20-SSOP)
COM2
RIN1
U6
11 _GND
-12V ¹⁰
12
13
14
RY5
DA3
15
16
17
18
19
RY4
DA2
DA1
RY3
RY2
RY1
RA5
DY3
9
8
7
RA4
DY2
DY1
RA3
RA2
RA1
6
5
4
3
2
20 _+5V
+12V ¹
GD75323 (20-SSOP)
COM3
CHIPSET_RI1#
VSB3V
R15
8.2K
Q1
NPN
C7
1000P
-12V
+12V
P1
5
9
4
8
3
7
2
6
1
UART DB9
RI4#
DTR4#
CTS4#
SOUT4
RTS4#
SIN4
DSR4#
DCD4#
VCC5V
-12V
+12V
P3
5
9
4
8
3
7
2
6
1
UART DB9
TRK0#/RI5#
WPT#/DTR5#
INDEX#/CTS5#
SOUT5
RTS5#
SIN5
DSKCHG#/DSR5#
RDATA#/DCD5#
VCC5V
-12V
+12V
P5
5
9
4
8
3
7
2
6
1
UART DB9
DIR#/RI6#
HDSEL#/DTR6#
STEP#/CTS6#
DRVA#/SOUT6
DENSEL#/RTS6#
MOA#/SIN6
WGATE#/DSR6#
WDATA#/DCD6#
VCC5V
R16 4.7K
R17
2.2K
D4
1N4148
RIN1
U3
11
GND
10
-12V
12
13
14
RY5
DA3
15
16
17
18
RY4
DA2
DA1
RY3
19 ^{RY 2}
RY1
RA5
DY3
9
8
7
RA4
DY2
DY1
RA3
6
5
4
3
RA2 ₂
RA1
20 _+5V
+12V ¹
GD75323 (20-SSOP)
COM4
U5
11 _GND
-12V ¹⁰
12
13
14
15
16
17
RY5
DA3
RY4
DA2
DA1
18 ^{RY 3}
19
RY2
RY1
RA5
DY3
RA4
DY2
DY1
9
8
7
6
5
4
RA3 ₃
RA2
RA1
2
20 _+5V
+12V ¹
GD75323 (20-SSOP)
COM5
U7
11 _GND
-12V ¹⁰
12
13
14
RY5
DA3
15
16
17
18
19
RY4
DA2
DA1
RY3
RY2
RY1
RA5
DY3
9
8
7
RA4
DY2
DY1
RA3
RA2
RA1
6
5
4
3
2
20 _+5V
+12V ¹
GD75323 (20-SSOP)
COM6
Wake up on ring for serial port circuit.
203
-12V
+12V
P2
5
9
4
8
3
7
2
6
1
UART DB9
-12V
+12V
P4
5
9
4
8
3
7
2
6
1
UART DB9
-12V
+12V
P6
5
9
4
8
3
7
2
6
1
UART DB9
F81866A
Title
Size
B
Date:
Feature Integration Technology Inc.
Document Number
F81866A
Friday , October 07, 2011
Sheet
Rev
<Rev Code>
2
of 8
Jan, 2012
V0. 12P