F81866A Datasheet, PDF (134/210 Pages) Feature Integration Technology Inc. – 6 UARTs Super IO With 128 Bytes FIFO and Power

TABLE A
Data Rate Table Select
FDD_DRT[1] FDD_DRT[0]
0
0
0
1
1
0
Data Rate
DATARATE1 DATARATE0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
Selected Data Rate
MFM
FM
500K
250K
300K
150K
250K
125K
1Meg
---
500K
250K
500K
250K
250K
125K
1Meg
---
500K
250K
2Meg
---
250K
125K
1Meg
---
F81866A
DENSEL
1
0
0
1
1
0
0
1
1
0
0
1
TABLE B
Drive Type
FDD_DT1
FDD_DT0
0
0
0
1
1
0
1
1
DRVDEN0
DENSEL
DATARATE1
DENSEL#
DATARATE0
Remark
4/2/1 MB 3.5”
2/1 MB 5.25”
1/1.6/1 MB 3.5” (3-Mode )
7.4 Parallel Port Device Configuration Registers (LDN CR03)
“-“ Reserved or Tri-State
Register 0x[HEX]
30
60
61
70
74
F0
Register Name
Parallel Port Device Enable Register
Base Address High Register
Base Address Low Register
IRQ Channel Select Register
DMA Channel Select Register
PRT Mode Select Register
MSB
--
00
01
--
--
01
Default Value
----
0000
1110
- - 01
-0-0
0000
LSB
-1
11
00
11
11
10
134
Jan, 2012
V0. 12P