F81866A Datasheet, PDF (137/210 Pages) Feature Integration Technology Inc. – 6 UARTs Super IO With 128 Bytes FIFO and Power

7.6 KBC Registers (CR05)
“-“ Reserved or Tri-State
Register 0x[HEX]
30
60
61
70
72
FE
Register Name
KBC Device Enable Register
Base Address High Register
Base Address Low Register
KB IRQ Channel Select Register
Mouse IRQ Channel Select Register
PS/2 Swap Register
F81866A
MSB
--
00
01
--
--
0-
Default Value
----
0000
1000
- - 00
- - 00
- 000
LSB
-1
00
00
00
00
01
7.6.1KBC Device Enable Register ⎯ Index 30h
Bit
Name
R/W Reset Default
7-1
Reserved
-
-
- Reserved
0: disable KBC.
0
KBC_EN
R/W 3VCC 1
1: enable KBC.
Description
7.6.2Base Address High Register ⎯ Index 60h
Bit
Name
R/W Reset Default
Description
The MSB of KBC command port address. The address of data port is
7-0 BASE_ADDR_HI R/W LRESET# 00h _{command port address + 4}
7.6.3Base Address Low Register ⎯ Index 61h
Bit
Name
R/W Reset Default
Description
The LSB of KBC command port address. The address of data port is command
7-0 BASE_ADDR_LO R/W LRESET# 60h _{port address + 4.}
7.6.4KB IRQ Channel Select Register ⎯ Index 70h
Bit
Name
R/W Reset Default
Description
7-4
Reserved
-
-
- Reserved.
3-0
SELKIRQ
R/W LRESET# 0h Select the IRQ channel for keyboard interrupt.
7.6.5Mouse IRQ Channel Select Register ⎯ Index 72h
Bit
Name
R/W Reset Default
Description
7-4
Reserved
-
-
- Reserved.
3-0
SELMIRQ
R/W LRESET# 0h Select the IRQ channel for PS/2 mouse interrupt.
7.6.6PS/2 Swap Register ⎯ Index FEh
Bit
Name
R/W Reset Default
7-5
Reserved
-
-
- Reserved
Description
137
Jan, 2012
V0. 12P