F81866A Datasheet, PDF (119/210 Pages) Feature Integration Technology Inc. – 6 UARTs Super IO With 128 Bytes FIFO and Power

6
AT_MODE
R/W 5VSB
5 GPIO_DEC_RANGE R/W 3VCC
4
PORT_4E_EN R/W 5VSB*
3-2 GPIO_PROG_SEL R/W 5VSB
1
Reserved
-
-
0 ^{CLK_TUNE_PROG_} R/W 3VCC
EN
F81866A
0: ATX Mode.
- 1: AT Mode.
The default value is determined by power on strap.
0: The GPIO I/O space is 8-byte.
0
1: The GPIO I/O space is 16-byte.
0: The configuration register port is 2E/2F.
1: The configuration register port is 4E/4F.
- _{This register is power on trapped by RTS1#/ Config4E_2E. Pull down}
to select port 2E/2F. This bit is accessed by the host side only.
*Trap value will reset by 5VSB.
Index 0x2C register select.
00: GPIO0_EN
0 01: GPIO1_EN
10: GPIO2_EN
11: Reserved.
- Reserved.
0 ^{Set “1” to enable index 0x29, 0x2A, 0x2B, 0x2C function as clock fine}
tune register.
7.1.10Multi-function Select 1 Register ⎯ Index 28h (Available when GPIO_PROG_SEL[0] = 0)
Bit
Name
R/W _Reset Default
Description
7
Reserved
-
-
- Reserved
Pin 9 ~ 21 function select.
6
FDC_GP_EN
R/W 5VSB
1 ^{These pins are controlled by FDC_GP_EN, UART5_FUNC_SEL, and}
UART6_FUNC_SEL.
If all these bits are clear to “0”, the function would be FDC.
Pin 102 ~ 118 function select.
5
LPT_GP_EN
R/W 5VSB
1 0: Functions as parallel port.
1: Functions as GPIO7x/GPIO8x.
Pin 61, 62 function select.
4
MO_ I2C _EN R/W 5VSB 0 0: PS/2 mouse interface MCLK/MDATA.
1: I2C SCL/SDA.
3-2 UART5_FUNC_SEL R/W 5VSB
UART 5 Function Select.
00: No UART 5 pin.
0 ^{01: Simple UART, only SIN5 and SOUT5 are available. Pin 57 will be}
function as SOUT5 and Pin 58 will be function as SIN5.
10: Simple UART with RTS#. Pin 59 will be function as RTS5#.
11: Full UART, pin 57 ~ 59, 17 ~ 21 will function as UART 5 pins.
1-0 UART6_FUNC_SEL R/W 5VSB
UART6 Function Select.
00: No UART6 pin.
0 ^{01: Simple UART, only SIN6 and SOUT6 are available. Pin 10 will be}
function as SOUT6 and Pin 11 will be function as SIN6.
10: Simple UART with RTS#. Pin 9 will be function as RTS6#.
11: Full UART, pin 9 ~ 16 will function as UART 6 pins.
119
Jan, 2012
V0. 12P