F81866A Datasheet, PDF (54/210 Pages) Feature Integration Technology Inc. – 6 UARTs Super IO With 128 Bytes FIFO and Power

F81866A
PECI Master DATA3 Register ⎯ Index 46h
Bit
Name
R/W Reset Default
Description
For RdIAMSR(), this byte is the most significant byte of “MSR Address”.
7-0
PECI_DATA3
R/W 5VSB
0
For RdPkgConfig() and WrPkgConfig(), this byte is the most significant
byte of “Parameter”.
Please refer to PECI interface specification for more detail.
PECI Master DATA4 Register ⎯ Index 47h
Bit
Name
R/W Reset Default
Description
For GetDIB() , this byte represents “Device Info”
For GetTemp(), this byte represents the least significant byte of
7-0
PECI_DATA4
R/W 5VSB 0 temperature.
For RdIAMSR() and RdPkgConfig() , this byte is “Completion Code”.
For WrPkgConfig(), this byte represents “DATA[7:0]”
PECI Master DATA5 Register ⎯ Index 48h
Bit
Name
R/W Reset Default
Description
For GetDIB() , this byte represents “Revision Number”
For GetTemp(), this byte represents the most significant byte of
7-0
PECI_DATA5
R/W 5VSB 0 temperature.
For RdIAMSR() and RdPkgConfig() , this byte represents “DATA[7:0]”
For WrPkgConfig(), this byte represents “DATA[15:8]”
PECI Master DATA6 Register ⎯ Index 49h
Bit
Name
R/W Reset Default
Description
7-0
PECI_DATA6
R/W 5VSB
0 ^{For RdIAMSR() and RdPkgConfig() , this byte represents “DATA[15:8]”.}
For WrPkgConfig(), this byte represents “DATA[23:16]”
PECI Master DATA7 Register ⎯ Index 4Ah
Bit
Name
R/W Reset Default
Description
For RdIAMSR() and RdPkgConfig() , this byte represents
7-0
PECI_DATA7
R/W 5VSB 0 “DATA[23:16]”.
For WrPkgConfig(), this byte represents “DATA[31:24]”
PECI Master DATA8 Register ⎯ Index 4Bh
Bit
Name
R/W Reset Default
Description
For RdIAMSR() and RdPkgConfig() , this byte represents
7-0
PECI_DATA8
R/W 5VSB 0 “DATA[31:24]”.
For WrPkgConfig(), this byte represents “AW FCS”
PECI Master DATA9 Register ⎯ Index 4Ch
Bit
Name
R/W Reset Default
Description
7-0
PECI_DATA9
R/W 5VSB
0 ^{For RdIAMSR(), this byte represents “DATA[39:32]”.}
For WrPkgConfig(), this byte represents “Completion Code”
54
Jan, 2012
V0. 12P