F81866A Datasheet, PDF (86/210 Pages) Feature Integration Technology Inc. – 6 UARTs Super IO With 128 Bytes FIFO and Power

commands to the system.
F81866A
Input Buffer
The input buffer is an 8-bit write-only register at I/O address 60h or 64h. Writing to address 60h
sets a flag to indicate a data write; writing to address 64h sets a flag to indicate a command write.
Data written to I/O address 60h is sent to keyboard through the controller's input buffer only if the
input buffer full bit in the status register is “0”.
Status Register
The status register is an 8-bit read-only register at I/O address 64h that holds information about
the status of the keyboard controller and interface. It may be read at any time.
BIT
BIT FUNCTION
DESCRIPTION
0
Output Buffer Full
0: Output buffer empty
1: Output buffer full
1
Input Buffer Full
0: Input buffer empty
1: Input buffer full
This bit may be set to 0 or 1 by writing to the system flag bit in the
2
System Flag
command byte of the keyboard controller (KCCB). It defaults to 0 after
a power-on reset.
3
Command/Data
0: Data byte
1: Command byte
0: Keyboard is inhibited
4
Inhibit Switch
1: Keyboard is not inhibited
0: Muse output buffer empty
5
Mouse Output Buffer
1: Mouse output buffer full
6
General Purpose Time-out ^{0: No time-out error}
1: Time-out error
7
Parity Error
0: Odd parity
1: Even parity (error)
Commands
COMMAND
20h
Read Command Byte
FUNCTION
86
Jan, 2012
V0. 12P