F81866A Datasheet, PDF (156/210 Pages) Feature Integration Technology Inc. – 6 UARTs Super IO With 128 Bytes FIFO and Power

5
GPIO45_ST
R
-
- The pin status of DSR4#/GPIO45.
4
GPIO44_ST
R
-
- The pin status of RTS4#/GPIO44.
3
GPIO43_ST
R
-
- The pin status of DTR4#/GPIO43.
2
GPIO42_ST
R
-
- The pin status of CTS4#/GPIO42.
1
GPIO41_ST
R
-
- The pin status of RI4#/GPIO41.
0
GPIO40_ST
R
-
- The pin status of DCD4#/GPIO40.
F81866A
7.7.8.4GPIO4 Drive Enable Register ⎯ Index B3h
Bit
Name
R/W Reset Default
GPIO47 Drive Enable.
7 GPIO47_DRV_EN R/W LRESET# 0 0: GPIO47 is open drain.
1: GPIO47 is push pull.
GPIO46 Drive Enable.
6 GPIO46_DRV_EN R/W LRESET# 0 0: GPIO46 is open drain.
1: GPIO46 is push pull.
GPIO45 Drive Enable.
5 GPIO45_DRV_EN R/w LRESET# 0 0: GPIO45 is open drain.
1: GPIO45 is push pull.
GPIO44 Drive Enable.
4 GPIO44_DRV_EN R/W LRESET# 0 0: GPIO44 is open drain.
1: GPIO44 is push pull.
GPIO43 Drive Enable.
3 GPIO43_DRV_EN R/W LRESET# 0 0: GPIO43 is open drain.
1: GPIO43 is push pull.
GPIO42 Drive Enable.
2 GPIO42_DRV_EN R/W LRESET# 0 0: GPIO42 is open drain.
1: GPIO42 is push pull.
GPIO41 Drive Enable.
1 GPIO41_DRV_EN R/W LRESET# 0 0: GPIO41 is open drain.
1: GPIO41 is push pull.
GPIO40 Drive Enable.
0 GPIO40_DRV_EN R/W LRESET# 0 0: GPIO40 is open drain.
1: GPIO40 is push pull.
Description
7.7.9.GPIO5x Configuration Registers
Register
0x[HEX]
Register Name
A0
GPIO5 Output Enable Register
A1
GPIO5 Output Data Register
A2
GPIO5 Pin Status Register
A3
GPIO5 Drive Enable Register
A8
GPIO5 SMI Enable Register
A9
GPIO5 SMI Status Register
MSB
Default Value
LSB
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
-
-
-
-
-
-
-
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
156
Jan, 2012
V0. 12P