82C836 Datasheet, PDF (74/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

Real Time Clock and Internal Timer Registers
Counter Operation s
Counter Operation
Due to the previously stated restrictions in Counter 0 and Counter 1, Counter 2 is used as
the example in describing counter operation, but the description of modes, 0, 2, 3, and 4
are relevant to all counters.
The following terms are defined for describing CTC operation.
• TMRCLK pulse ----a clock equivalent to OSC1 (14.31818 MHz) divided by 12.
• Trigger----the rising edge of the GATE2 input.
• Counter load ----the transfer of the 16-bit value in CIL and CIH to the CE.
• Initialized----Control Word written and the Counter Input Latches loaded.
Counter 2 operates in one of the following modes:
• Mode 0----Interrupt on Terminal Count
Writing the Control Word causes OUT2 to go low and remain low until the CE
reaches zero; at which time it returns to high and remains high until a new count or
Control Word is written. Counting is enabled when GATE2 = 1. Disabling the count
has no effect on OUT2. The CE is loaded with the first TMRCLK pulse after the
Control Word and initial count are loaded. When both CIL and CIH are written, the
CE is loaded after CIH is written. This TMRCLK pulse does not decrement the count
(for an initial count of n, OUT2 does not go high until n+1 TMRCLK pulses after
initialization).
If an initial count is written with GATE2 = 0, it is still loaded on the next TMRCLK
pulse but counting does not begin until GATE2 = 1. Therefore, OUT2 goes high n
TMRCLK pulses after GATE2 = 1.
• Mode 1----Hardware Retriggerable One-Shot
Writing the Control Word causes OUT2 to go high initially. Once initialized, the
counter is armed and a trigger causes OUT2 to go low on the next TMRCLK pulse.
OUT2 then remains low until the counter reaches zero. An initial count of n results
in a one-shot pulse n TMRCLK cycles long.
Any subsequent triggers while OUT2 is low causes the CE to be reloaded, extending
the length of the pulse. Writing a new count to CIL and CIH does not affect the
current one-shot unless the counter is retriggered.
• Mode 2----Rate Generator
Mode 2 functions as a divide-by-n counter, with OUT2 as the carry. Writing the
Control Word during initialization sets OUT2 high.
When the initial count is decremented to one, OUT2 goes low on the next TMRCLK
pulse. The following TMRCLK pulse returns OUT2 high, reloads the CE, and the
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