82C836 Datasheet, PDF (56/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

System Interface
DRAM Interface s
The target pages can come from anywhere in system memory, including the first 1MB.
No hardware checking is performed for conflicts with DOS memory or other memory
areas. It is the responsibility of the EMS driver to select appropriate values for the page
register contents.
To avoid potential conflicts between extended memory and EMS memory, i.e., software
erroneously altering EMS memory through extended memory access, internal
configuration register 4E, bits 3-0, can be used to set a limit on the top of extended
memory. Memory above that limit will then be accessible only through the EMS
mechanism. Direct CPU memory accesses at addresses above the limit will go to the
AT bus see Figure 5-3.
Figure 5-3. Example of EMS/Extended Memory
2M
EXPANDED
2
MEMORY
1.5M
EXTENDED
MEMORY
1M
1
EMS WINDOWS
640K
"DOS"
SPACE
0
ICR 4D,4:0 = 0101, 2M MEMORY
ICR 4E,2:0 = 011 , 1.5M EXTENDED BOUNDARY
1 BOTH CPU ACCESS AND EMS ACCESS ALLOWED
2 ONLY EMS ACCESS ALLOWED
EMS paging and the EMS I/O ports are normally managed by application software or an
EMS driver that allows applications to access more RAM than is normally allowed by
DOS. More information on software implementation can be obtained from various Intel ^®
and Microsoft ^® publications.
Chips and Technologies, Inc.
PRELIMINARY
Revision 3.0 5-1 5