82C836 Datasheet, PDF (47/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

s DRAM Interface
System Interface
In addition to the memory address ranges for ROM and shadow RAM discussed
earlier, local RAM can be enabled or disabled in a single 384KB block in the range
040000H-09FFFFH (ICR 4EH). Memory addresses in the range 100000H-FFFFFFH
(extended memory) and EMS access (expanded memory) are discussed in a later section
titled SCATsx Memory Bank Utilization. Memory accesses always go to the AT bus,
unless local RAM or ROM has been enabled at the referenced memory address.
Bits 4-0 of internal configuration register 4DH must be set according to the physical
DRAM configuration. Table 5-1 shows the valid configurations with either nonencoded
RAS or encoded RAS. Table 5-2 shows additional configurations that are valid only
with encoded RAS. Table 5-3 shows the 4MB configurations, valid only with
nonencoded RAS.
Table 5-1. Valid Configurations----Nonencoded or Encoded RAS
ICR 4DH Bits 4-0 ^
00H ^Œ
01H
02H ^
03H ^Ž
04H
05H
06H
07H
08H ^
09H ^
0AH ^
0BH
0CH
0DH
0EH ^
0
0
256KW
256KW
256KW
256KW
256KW
256KW
256KW
256KW
256KW
256KW
1MW
1MW
1MW
1MW
1
0
0
256KW
256KW
256KW
256KW
256KW
256KW
1MW
1MW
1MW
0
1MW
1MW
1MW
Banks ^
2
0
0
0
0
256KW
256KW
1MW
1MW
0
1MW
1MW
0
0
1MW
1MW
3
4-7
0
0
0
0
0
0
0
0
0
0
256KW
0
0
0
1MW
0
0
0
0
0
1MW
0
0
0
0
0
0
0
1MW
0
Total Local Memory
0
512KB
1MB
640K + 384K
1.5MB
2MB
3MB
5MB
2.5MB
4.5MB
6.5MB
2MB
4MB
6MB
8MB
K = 1024
M = 1048576
W = word (two bytes)
B = byte
ΠAll memory accesses go to the AT bus. This can be used to turn off on-board RAM even if on-board RA M exists.
 The DRAM is mapped as 1MB conventional (subject to enabling or disabling of the top 384K) and no ext ended memory.
Ž The DRAM is mapped as 640KB conventional, 384KB extended. The 384KB block is addressed at 100000H-1 5FFFFH. There is no shadow RAM.
 In all configurations, all memory beyond the first 1MB (or beyond the first 640KB in configuration 0 3H) is available for use as extended memory (addressed
linearly starting at 100000H). Extended memory can be accessed either directly (in 80386sx protecte d mode) or through expanded memory address translation
(EMS).
 Banks are normally mapped in ascending physical address order i.e., Bank 1 has a higher starting add ress than Bank 0, etc. However, in configuration 08-0AH,
the mapping order is changed so that the 256KW bank has the highest starting address instead of the lowest.
5-6 Revision 3.0
PRELIMINARY
Chips and Technologies, Inc.