82C836 Datasheet, PDF (164/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

s CPU Access to AT-Bus
System Timing Relationships
The following programmable options are available with hidden refresh (ICR 63H):
• RAS-only Refresh ----In RAS-only refresh, -CAS remains high and -MWE remains low.
• AT Refresh OFF ----In this mode, ALE, -REF and -XMEMR remain inactive during
hidden refresh. IOCHRDY has no effect. Only the local DRAM is refreshed, not the
AT bus, and the total refresh cycle time is correspondingly shorter (see Table 11-1).
For compatibility with many AT bus add-in cards, AT refresh should not be turned off.
• Refresh on Idle ----Enabling this option prevents hidden refresh from starting until after
a CPU idle state. Normally, a hidden refresh can begin as early as the next T-state
following -READY, as shown in Figure 11-17. Refresh on idle prevents a hidden
refresh from starting if the next T-state after -READY is a T1-state (-ADS asserted).
In most systems, refresh on idle will probably have no measurable performance effect
and should remain disabled.
The exact number of PROCCLK cycles between various events in hidden refresh
depends on the CPU speed as programmed in ICR 63H. The PROCCLK counts also
depend on whether AT refresh is enabled or disabled, as in the following Table.
Table 11-2. PROCCLK Cycles and Hidden Refresh
Events
ALE rise to -REF/-CAS fall
-REF/-CAS fall to -XMEMR/-RAS fall
-XMEMR/-RAS fall to IOCHRDY sampling
IOCHRDY sampled high to -XMEMR/-RAS rise
Total -XMEMR/-RAS low time without IOCHRDY
-XMEMR/-RAS rise to -REF/-CAS rise
-REF/-CAS rise to ALE fall
Total hidden refresh time without IOCHRDY
16MHz
2
2^†
4
1^†
2
----
5
----
7
4^†
2
1^†
4^‡
4^†
20
12^†
† Denotes AT refresh OFF.
‡ Plus one PROCCLK if needed to make ALE fall at end of T-state.
20MHz
2
2^†
5
2^†
3
----
6
----
9
4^†
3
1^†
4^‡
5^†
24
14^†
25MHz
2
2^†
7
2^†
4
----
7
----
11
4^†
3
1^†
4‡
5^†
28
14^†
Standby Refresh (32KHz-Based)
In addition to HLDA refresh (14.3MHz based, CAS-before-RAS or RAS-only)
and hidden refresh, the 82C836B also supports standby refresh (useful only in
CAS-before-RAS mode). Standby refresh operates only if it has been enabled via
ICR 60H. It allows the contents of DRAM to be preserved during power down.
Figure 11-18 shows standby refresh timing:
• PWRGOOD going low indicates the imminent loss of main power. The 82C836
may complete one more normal refresh (HLDA or hidden), but must then switch to
standby refresh as quickly as possible.
1 1 -32 Revision 3.0
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