82C836 Datasheet, PDF (124/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

s Configuration Registers
82C386 CHIPSet Data Sheet
Index Register 61H controls the following special modes for video access:
• Fast 8-bit I/O access ----cycle timing equivalent to 16-bit cycles, but using only the low
byte of the data bus for data transfer.
• Fast 8-bit memory access ----cycle timing equivalent to 16-bit cycles, but using only the
low byte of the data bus for data transfer.
• Forced -MEMCS16 for 16-bit memory access. 82C836B asserts -MEMCS16 and
performs a 16-bit cycle, eliminating the need for equivalent logic in the video
subsystem.
In all cases, IOCHRDY can be used to insert bus wait states.
Table 10-16. Index 61H----Fast Video Control
Bit
Name
Description
7-6
----
Reserved. Write as 0.
5
I/O 3D0-3DFH
0 = Normal operation (default)
Enable
1 = Fast 8-bit I/O
4
I/O 3C0-3CFH
0 = Normal operation (default)
Enable
1 = Fast 8-bit I/O
3
I/O 3B0-3BBH
The parallel port I/O address range, 3BC-3BFH, is not affected by this bit.
Enable
0 = Normal operation (default)
1 = Fast 8-bit I/O
2
Fast 8-bit I/O
Enables the fast 8-bit I/O mode for I/O accesses in the ranges selected via
Enable
bits 3, 4, and 5 above. Bits 3, 4, and 5 have no effect if bit 2 is zero.
0 = Normal operation (default)
1 = Fast 8-bit I/O
1
Force MEMCS16. 0 = Normal operation (default)
1 = 82C836B asserts -MEMCS16 and performs 16-bit cycle timing and
protocol for all memory accesses in the ranges selected via ICR 62H.
Do not set both bit 1 and bit 0 to one at the same time.
0
Fast 8-bit Memory Enables the fast 8-bit mode for memory accesses in the ranges selected via
Enable
ICR 62H.
0 = Normal operation (default)
1 = Fast 8-bit memory access.
Index 62H enables the memory address ranges selected below for either fast 8-bit
memory timing or forced MEMCS16 mode, depending on the bit settings in ICR 61H.
0 = Range not selected (default)
1 = Range selected
1 0-1 2 Revision 3.0
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