82C836 Datasheet, PDF (73/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

s Programming the Counter Timer Controller
Real Time Clock and Internal Timer Registers
B4
LS
B5
LC
B6-B7 1
Writing a zero in bit 4 causes the selected counter(s) to latch the
current condition of its Control Register, Null Count, and Output
into the Status Register. The next read of the counter results in the
contents of the Status Register being read.
Writing a zero in bit 5 causes the selected counter(s) to latch to the
state of the CE in COL and COH.
Read as ones.
Status Byte
The format of the Status Byte command is shown in Figure 6-9.
Figure 6-9. Status Byte Command
B7 B6 B5 B4 B3 B2 B1 B0
________ ________ _________________ ___________________________ ________
BCD Binary Coded Decimal
M<2:0> Mode Counter
F<0:1> Flag Command
NC Null Count Flag
OUT Out Signal
bits: B0
B2-B3
B4-B5
B6
B7
BCD Bit 0 indicates the CE is in operation in BCD format.
M<0:2> These three bits reflect the mode of the counter and are interpreted in
the same manner as in Write command operations.
F<0:1>
Bits 4-5 contain the F0 and F1 command bits, which were written
to the Command Register of the counter during initialization. This
information is useful when determining whether the high byte, low
byte, or both must be transferred during counter read/write
operations.
NC
Bit 6 contains the condition of the Null Count flag. This flag is used
to indicate the contents of the CE are valid. NC is set to a one during
a write to the Control Register or the counter. NC is cleared to a
zero whevever the counter is loaded from the counter input registers.
OUT Bit 7 contains the state of the OUT signal of the counter.
6-1 4 Revision 3.0
PRELIMINARY
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