82C836 Datasheet, PDF (179/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

System Characteristics
AC Characteristics 16- and 20MHz s
Table 12-18. Refresh----Output Responses (continued)
Symbol
t269
t270
t271
t272
t273
Parameters
LOMEGCS delay from -REFRESH
-CAS fall from HLDA rise in CAS-RAS HLDA
refresh
-REFRESH active from PROCCLK in Hidden
Refresh, or in HLDA refresh in Early READY mode
following memory write
-XMEMR fall from PROCCLK in Hidden Refresh
-XMEMR rise from PROCCLK in Hidden Refresh
* Not applicable to 82C836B. 10ns minimum for 82C836A.
16MHz
Min. Max.
---- 44
*
----
---- 50
---- 50
---- 50
20MHz
Min. Max.
---- 44
*
----
---- 50
---- 50
---- 50
Table 12-19. Refresh----Formula Specifications
Symbol
te260
te270
te271
te271a
te272
te273
Critical Path
REF to XMEMR delay in HLDA
refresh
CAS precharge in CAS-RAS refresh
REF to XMEMR in Early READY
mode
REF to XMEMR delay in Hidden
Refresh
XMEMR low time in Hidden Refresh
Address hold after XMEMR rise
Formula
t260-t263
t270-t103
t271-t263
t271-t272
t272-t273
t273-t271
* Not applicable to 82C836B. 9ns minimum for 82C836A.
** 1ns maximum for 82C836A.
*** 4ns maximum for 836A.
16MHz
Min. Max.
---- 16
20MHz
Min. Max.
---- 16
*
----
---- 16
*
----
---- 16
---- 5**
---- 5**
---- 15*** ---- 15***
---- 50
---- 38
Table 12-20. Refresh----Input Requirements
Symbol
t280
t281
t282
Parameters
IOCHRDY setup before OSC2 rise ^†
IOCHRDY hold after OSC2 rise ^†
-REFRESH setup before OSC2 rise ^†
16MHz
Min. Max.
20 ----
7
----
25 ----
20MHz
Min. Max.
15 ----
5
----
20 ----
† Certain input parameters, as noted, are nonrestrictive. If these parameters are violated, the signa l may not be recognized
until the subsequent clocking period. The parameter specifies only the conditions needed to guarant ee recognition of the
signal on a particular clock edge.
Chips and Technologies, Inc.
PRELIMINARY
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