82C836 Datasheet, PDF (17/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

s Architectural Overview
82C836 CHIPSet Introduction
Table 1-2 lists the key signals that signify bus ownership. Additional information
on signal functions and timing relationships is found in Section 11, System Timing
Relationships and Section 12, System Characteristics, subsection titled AC
Characteristics.
Table 1-2. Bus Ownership
HLDA
L
H
H
H
H
AEN
L
H
L
H
L
-MASTER
H
H
L
H
L
-REFRESH
H
H
H
L
L
Bus Owner
System CPU
DMA controller
Add-On card bus master
Refresh, initiated by system
Refresh, initiated by master
While -MASTER is inactive, AEN should follow HLDA. When -MASTER is active, AEN should be forced low .
1 -6 Revision 3.0
PRELIMINARY
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