EP7209 Datasheet, PDF (98/128 Pages) Cirrus Logic – Ultra-Low-Power Audio Decoder System-on-Chip

EP7209
EXPCLK
nCS[5:0]
nMOE
A[27:4]
WORD
D[31:0]
Bus held
EXPRDY
tEXBST
tEXBST
0
4
8
t1
tEXRD
t3 t4
Data in
t3 t4
Data in
t3 t4
Data in
t5
t6
NOTES:
1) tEXBST = 35 ns at 36.864 MHz
35 ns at 18.432 MHz
55 ns at 13.0 MHz
(Value for 36.864 MHz assumes 1 wait state.)
Maximum values for minimum wait states. This time can be extended by integer multiples of the
clock period (27 nsec at 36 MHz, 54 nsec at 18.432 MHz and 77 ns at 13 MHz), by either driving
EXPRDY low and/or by programming a number of wait states. EXPRDY is sampled on the falling
edge of EXPCLK before the data transfer. If low at this point, the transfer is delayed by one clock
period where EXPRDY is sampled again. EXPCLK need not be referenced when driving
EXPRDY, but is shown for clarity.
2) Consecutive reads with sequential access enabled are identical except that the sequential
access wait state field is used to determine the number of wait states, and no idle cycles are
inserted between successive non-sequential ROM/expansion cycles. This improves perfor-
mance so the SQAEN bit should always be set where possible.
Figure 14. Sequential Page Mode Read Cycles with Minimum Wait States
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DS453PP2